IEEE FAB.ulous is an exclusive initiative that brings together young professionals and academics passionate about VLSI design, offering them a unique opportunity to create and build their own integrated circuits using open-source tools. This edition’s theme, “Bring your design into reality through actual silicon,” emphasizes the hands-on experience of transforming designs into real, fabricated chips.

Participants will receive mentorship from IEEE CEDA through weekly online webinars, guiding them in using open-source VLSI tools to design and tape out their projects. The top 10 designs will be selected and awarded in the grand finale, with the winning designs sent for fabrication. Participants are encouraged to focus on designing widely-used IPs and submit their work for evaluation. This event provides a valuable opportunity for young professionals in the VLSI domain to enhance their design skills and prepare for industry challenges.